Methods for optimizing performance in large language model training and inference.
― 8 min read
Computer Science - Hardware Architecture
RSSAutoVCoder enhances LLMs' ability to generate high-quality Verilog code effectively.
― 5 min read
A tailored RAG flow enhances question-answering for EDA tools.
― 7 min read
Simopt enhances FPGA design by leveraging simulation data for improved performance.
― 5 min read
MINT offers a cost-effective way to tackle the Rowhammer issue in DRAM.
― 5 min read
New strategies aim to secure DRAM against memory vulnerabilities.
― 5 min read
A new method enhances LLM efficiency in creating complex hardware designs.
― 5 min read
A new framework improves RTL code generation through dataset augmentation and self-reflection.
― 6 min read
An innovative approach to improve image quality in satellite data transmission.
― 6 min read
A new framework aims to bolster security for IoT devices against side-channel threats.
― 7 min read
SuperFlow improves the design of superconducting circuits for better efficiency and performance.
― 6 min read
A guide to how CNNs enhance image processing and recognition.
― 5 min read
A comparison of KANs and MLPs in classification performance and hardware efficiency.
― 5 min read
RoSE-Opt automates analog circuit design for improved efficiency and reliability.
― 5 min read
A look into the Field-Programmable Pixel Convolutional Array technology and its impact.
― 6 min read
A new adder design enhances efficiency in deep learning hardware.
― 5 min read
A new method improves verification for modern RISC-V processors, ensuring design correctness.
― 5 min read
A look at the new flexible multi-port memory design for modern devices.
― 6 min read
Exploring the flexible nature and applications of liquid neural networks.
― 6 min read
A new method enhances the protection of IC designs through efficient watermarking.
― 5 min read
Blink offers a faster way to design power monitoring systems, improving efficiency.
― 5 min read
A framework enhances energy management in large language models while maintaining performance.
― 4 min read
New methods aim to run powerful models on limited hardware efficiently.
― 4 min read
Exploring improved devices for better interaction with large language models.
― 8 min read
A powerful simulator designed to enhance self-driving car training through rapid scenario generation.
― 5 min read
Triangular Input Movement enhances efficiency in convolutional neural networks.
― 6 min read
A new model aligns programming with neuromorphic hardware for better efficiency.
― 5 min read
A look at how Graph Neural Networks operate and their significance.
― 6 min read
A new system enhances emergency management in cities facing infrastructure challenges.
― 6 min read
MetaWearS improves wearable devices with efficient updates and less data.
― 5 min read
A new approach enhances energy efficiency and processing speed in CNNs.
― 5 min read
The throttLL'eM framework cuts energy use while ensuring quick responses.
― 6 min read
Using FPGAs and HLS tools to enhance FTLE calculations in fluid dynamics.
― 6 min read
Exploring the potential of tinyML in everyday technology.
― 5 min read
A new framework simplifies compiler processes for tensor accelerators using LLMs.
― 6 min read
Exploring the benefits of cryogenic and superconducting computing for improved speed and efficiency.
― 5 min read
New framework for NPUs enhances resource sharing and reduces costs.
― 4 min read
Deeploy streamlines deployment of small language models on microcontrollers, enhancing AI accessibility.
― 6 min read
A method to forecast FPGA requirements for neural networks before building them.
― 6 min read
A study reveals vulnerabilities in logic locking affecting data security.
― 6 min read