Siddharth Garg

A new method improves efficiency and design quality in logic synthesis using machine learning.

ASCENT improves hardware security against power side-channel attacks during design.

This article discusses uncertainty-aware models for better vector field analysis using deep neural networks.

A new method enhances LLM efficiency in creating complex hardware designs.

AutoChip uses EDA feedback to improve Verilog code generation by LLMs.

Masala-CHAI streamlines SPICE netlist generation for electronic circuit design.

TruncFormer speeds up private inference for large language models while keeping data safe.

A new approach to gauge how machines perceive similarities across different data types.