VerilogCoder uses AI to simplify and improve hardware design tasks.
― 5 min read
Haoxing Ren
A new benchmark assesses LLMs’ ability to generate Verilog code.
― 6 min read
New methods improve high-level synthesis through efficient design space exploration.
― 5 min read
Automated DRC code generation streamlines circuit design and enhances accuracy.
― 6 min read
Combining language models enhances instruction-following in chip design tasks.
― 6 min read