Understanding RISCV Multiplication Techniques
An overview of RISCV multiplication methods and their hardware needs.
― 4 min read
Table of Contents
Introduction to RISCV Multiplication
Multiplication in the RISCV processor architecture is different from other instructions. While most instructions run quickly and only need one clock cycle, multiplication is more demanding. It requires more resources and takes longer, which can be a concern for certain types of computer designs. In the basic RISCV setup, there is no multiplication command, making it easier for simpler versions of the processor. Larger versions do include multiplication commands through an added feature known as the M extension, which covers different types of multiplication such as signed, unsigned, and mixed.
Types of Multiplication
At first glance, having different ways to multiply may seem odd. For example, when multiplying with 32-bit numbers, whether a number is signed or unsigned does not affect the final result for the lower half of the multiplied outcome. However, the signed nature does matter for the higher half of the result.
Most current designs for multiplication rely on a method known as long multiplication, which has two main steps:
- Calculate Partial Products.
- Add all those partial products together.
The first step is simple and can be done in parallel, but the second step is more intricate. Many approaches exist to handle this step, balancing speed and how much space is used.
Efficient Multiplication Methods
The paper discusses how small changes to the first step can help in using one process for all three multiplication forms (signed, unsigned, and mixed).
Long Multiplication Basics
Long multiplication for binary numbers follows a basic process. Start with the least significant bit (the rightmost bit) of the multiplier. Write down the multiplicand only if that bit is 1. If the bit is 0, just write zeroes. Repeat this for every bit, shifting the multiplicand left as you move to higher bits, leading to several partial products. The end result is found by adding all the partial products together.
Hardware Needs
Performing the long multiplication method in hardware has two tasks:
- Calculate the partial products, which can be done at the same time.
- Calculate the sum of all partial products, often using an adder tree.
For each partial product, we focus on multiplying it by a fixed number of bits, which can be done efficiently with specific operations in a vector format.
Signed Multiplication
When it comes to signed numbers, they are stored differently. A signed number uses a format that allows for both positive and negative values, with the smallest and largest values it can hold defined by its size.
While adding and subtracting works normally, multiplying signed numbers is tricky. A method developed by Baugh and Wooley allows unsigned multiplication methods to work for signed numbers with only minor adjustments. The approach involves finding the 2's complement of negative numbers, which allows us to add them correctly.
Signed Multiplication Steps
In signed multiplication, the positive numbers can be added directly. For the negative numbers, we must adjust their representation and then add them together. The similarities in the unsigned multiplication scheme help in making this easier, as the lower bits of both schemes can yield the same results.
Mixed Multiplication
The RISCV instruction set includes a unique instruction that takes an unsigned number for the multiplier and a signed number for the multiplicand. This type of multiplication requires finding the 2's complement of the signed number to allow for correct addition.
The process is similar to signed multiplication, with the last step sometimes needing a minor adjustment to account for any extra actions needed in the hardware.
Merging Multiplication Types
Incorporating these different types of multiplication can be streamlined. By using binary signals to represent signed, unsigned, and mixed multiplication, it is possible to combine all implementations into one multiplier.
There are three kinds of partial products:
- The first one
- The last one
- The ones in between
The first partial product remains the same for certain bits, while others may need adjustments based on whether the operation is signed or mixed.
Intermediate and Last Partial Products
The middle partial products depend on their specific positions and might be shifted. Most bits remain unchanged, though some changes are needed for signed and mixed operations.
The last partial product can be more complex. It requires inversion of certain bits for signed multiplication, and the most significant bit may also need adjustments depending on whether the multiplication is mixed.
Conclusion
Through minor changes to how partial products are handled, it is feasible to manage all types of RISCV multiplication with a single multiplier. This approach simplifies the design significantly, reducing complexity and making it easier to implement, especially in systems that require multiple cores or work with vector-like operations. By streamlining these processes, the implementation becomes more efficient, which is particularly valuable in modern computing environments.
Title: Baugh-Wooley Multiplication for the RISCV Processor
Abstract: This article describes an efficient way to implement the multiplication instructions for a RISCV processor. Instead of using three predefined IP blocks for signed, unsigned and mixed multiplication, this article presents a novel extension to the Baugh-Wooley multiplication algorithm which reduces area and power consumption with roughly a factor three.
Authors: Franc Grootjen, Nikolai Schauer
Last Update: 2023-04-19 00:00:00
Language: English
Source URL: https://arxiv.org/abs/2304.09952
Source PDF: https://arxiv.org/pdf/2304.09952
Licence: https://creativecommons.org/licenses/by-nc-sa/4.0/
Changes: This summary was created with assistance from AI and may have inaccuracies. For accurate information, please refer to the original source documents linked here.
Thank you to arxiv for use of its open access interoperability.